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Co-Scheduling Hardware and Software Pipelines

Govindarajan, R and Altman, Erik R and Gao, Guang R (1996) Co-Scheduling Hardware and Software Pipelines. In: Second International Symposium on High-Performance Computer Architecture, 3-7 February 1996, San Jose, California, pp. 52-61.

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Abstract

In this paper we propose co-scheduling, a framework for simultaneous design of hardware pipelines structures and software-pipelined schedules. Two important components of the co-scheduling framework are: (1) An extension to the analysis of hardware pipeline design that meets the needs of periodic (or software pipelined) schedules. Reservation tables, forbidden latencies, collision vectors, and state diagrams from classical pipeline theory are revisited and extended to solve the new problems. (2) An efficient method, based on the above extension of pipeline analysis, to perform (a) software pipeline scheduling and (b) hardware pipeline reconfiguration which are mutually compatible. The proposed method has been implemented and preliminary experimental results for 1008 kernel loops are reported. Co-scheduling successfully obtains a schedule for 95% of these loops. The median time to obtain these schedules is 0.25 seconds on a Sparc-20.

Item Type: Conference Paper
Additional Information: 1996 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE
Department/Centre: Division of Information Sciences > Supercomputer Education & Research Centre
Date Deposited: 25 Aug 2008
Last Modified: 19 Sep 2010 04:37
URI: http://eprints.iisc.ernet.in/id/eprint/10769

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