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A parallel evolutionary programming-based channel router

Rao, Prahlada BB and Hansdah, RC (1995) A parallel evolutionary programming-based channel router. In: 1st IWPP. Parallel Processing. Proceedings of the First International Workshop on Parallel Processing (IWPP-94), 26-31 Dec. 1994, Bangalore, India, pp. 281-286.

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Abstract

We propose a parallel algorithm for an evolutionary programming based two layer channel router (EPCHR). Channel routing is an important phase of the circuit layout in VLSI design. Channel routing can be done in two or more layers. The two layer channel routing is an NP complete combinatorial optimization problem. Evolutionary programming (EP) is a population based stochastic search technique. The proposed parallel EPCHR design takes care of the conditions imposed by the EPCHR algorithm. In the parallel EPCHR model we call one processor a master and the remaining processors are slave processors. Since most of the time in the EPCHR algorithm is spent in the generation of offspring and fitness evaluation, this part of the computation is distributed to the slave processors. The selection in EPCHR, needs to be done on the total of parents and offspring; hence, is done at the master processor. The parallel EPCHR algorithm is implemented in C, on CDAC's PARAM machine. The speedup obtained is good and encouraging

Item Type: Conference Paper
Additional Information: Copyright of this article belongs to Tata McGraw-Hill.
Keywords: circuit layout CAD;computational complexity;genetic algorithms;parallel algorithms;stochastic programming;VLSI
Department/Centre: Division of Electrical Sciences > Computer Science & Automation (Formerly, School of Automation)
Date Deposited: 12 Sep 2007
Last Modified: 10 Jan 2012 09:41
URI: http://eprints.iisc.ernet.in/id/eprint/10848

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