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Design of High Performance Two Stage CMOS Cascode Op-Amps with Stable Biasing

Mandal, Pradip and Visvanathan, V (1996) Design of High Performance Two Stage CMOS Cascode Op-Amps with Stable Biasing. In: 9th International Conference on VLSI Design, 1996, 3-6 January 1996, Bangalore, India, pp. 234-237.

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Abstract

The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various performance metrics like low frequency common mode and power supply rejection ratios, slew rate and the sensitivity of the systematic offset are substantially improved. The improved performance is theoretically predicted and substantiated through circuit simulations.

Item Type: Conference Paper
Additional Information: IEEE 1995.Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre: Division of Information Sciences > Supercomputer Education & Research Centre
Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited: 25 Aug 2008
Last Modified: 19 Sep 2010 04:37
URI: http://eprints.iisc.ernet.in/id/eprint/10857

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