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Low threshold voltage ZnO thin film transistor with a $Zn_{0.7}Mg_{0.3}O$ gate dielectric for transparent electronics

Dhananjay, * and Krupanidhi, SB (2007) Low threshold voltage ZnO thin film transistor with a $Zn_{0.7}Mg_{0.3}O$ gate dielectric for transparent electronics. In: Journal of Applied Physics, 101 (12). 123717-1-123717-6.

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Abstract

A highly transparent all ZnO thin film transistor (ZnO-TFT) with a transmittance of above 80% in the visible part of the spectrum, was fabricated by direct current magnetron sputtering, with a bottom gate configuration. The ZnO-TFT with undoped ZnO channel layers deposited on 300 nm $Zn_{0.7}Mg_{0.3}O$ gate dielectric layers attains an on/off ratio of $10^4$ and mobility of $20 cm^2 /V s$. The capacitance-voltage C−V characteristics of the ZnO-TFT exhibited a transition from depletion to accumulation with a small hysteresis indicating the presence of oxide traps. The trap density was also computed from the Levinson’s plot. The use of $Zn_{0.7}Mg_{0.3}O$ as a dielectric layer adds additional dimension to its applications. The room temperature processing of the device depicts the possibility of the use of flexible substrates such as polymer substrates. The results provide the realization of transparent electronics for next-generation optoelectronics.

Item Type: Journal Article
Additional Information: Copyright of this article belongs to American Institute of Physics.
Department/Centre: Division of Physical & Mathematical Sciences > Instrumentation and Applied Physics (Formally ISU)
Division of Chemical Sciences > Materials Research Centre
Date Deposited: 28 Sep 2007
Last Modified: 19 Sep 2010 04:39
URI: http://eprints.iisc.ernet.in/id/eprint/11912

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