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Efficient Register Allocation Through Region-based Compilation for EPIC Architectures

Kim, Hansoo and Gopinath, K (2002) Efficient Register Allocation Through Region-based Compilation for EPIC Architectures. IISc­-CSA-­2002- ­3.

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Abstract

Using predication, larger units of compilation ("regions") such as hyperblocks are possible. Predication impacts register allocation in many ways: liveness computation, priority computation, etc. In this paper, we empirically study the problem of register allocation in the context of an EPIC-based compilation system, the Trimaran system[18]. While region-based register allocation typically has a lower compilation time compared to global register allocation, it has a potential weakness because of the limited scope for optimization with region types that are totally contained within function boundaries. While we want to reduce compilation time as much as possible, we want execution performance to be comparable to a global (within a function) algorithm. With this mind, we study ways of improving execution performance of a region based register allocator while preserving the compile time advantages. One prime technique is the propagation of carefully selected information across regions to circumvent the limited scope while compiling a region. We have been able to show that the goal can be achieved: we report savings of about 20-50% in compilation time while execution time is lower or only a few percent higher than the global algorithm.

Item Type: Departmental Technical Report
Additional Information: The first author Hansoo Kim is associated with Courant Inst of Math Sciences, NYU.
Keywords: EPIC Architecture;VLIW
Department/Centre: Division of Electrical Sciences > Computer Science & Automation (Formerly, School of Automation)
Date Deposited: 01 Jun 2004
Last Modified: 19 Sep 2010 04:12
URI: http://eprints.iisc.ernet.in/id/eprint/16

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