Nagpal, Rahul and Bhowmik, Anasua (2005) Criticality Driven Energy Aware Speculation for Speculative Multithreaded Processors. In: High Performance Computing - Hipc 2005, Proceedings, December 18-21, 2005., Goa, India.
|
PDF
fulltext.pdf - Published Version Restricted to Registered users only Download (295Kb) | Request a copy |
Abstract
Speculative multithreaded architecture (SpMT) philosophy relies on aggressive speculative execution for improved performance. Aggressive speculative execution results in a significant wastage of dynamic energy due to useless computation in the event of mis-speculation. As energy consumption is becoming an important constraint in microprocessor design, it is extremely important to reduce such wastage of dynamic energy in SpMT processors in order to achieve a better performance to power ratio. Dynamic instruction criticality information can be effectively applied to control aggressive speculation in SpMT processors. In this paper, we present a model of micro-execution for SpMT processors to determine dynamic instruction criticality. We also present two novel techniques utilizing criticality information, namely delaying non-critical loads and criticality based thread-prediction for reducing useless computation and energy consumption. Our experiments show 17.71% and 11.63% reduction in dynamic energy for criticality based thread prediction and criticality based delayed load scheme respectively while the corresponding improvements in dynamic energy delay products are 13.93% and 5.54%.
| Item Type: | Conference Paper |
|---|---|
| Additional Information: | Copyright of this article belongs to Springer-Verlag Berlin. |
| Department/Centre: | Division of Electrical Sciences > Computer Science & Automation (Formerly, School of Automation) |
| Date Deposited: | 05 Mar 2009 06:33 |
| Last Modified: | 19 Sep 2010 04:54 |
| URI: | http://eprints.iisc.ernet.in/id/eprint/16906 |
Actions (login required)
![]() |
View Item |
