Das, Bishnu Prasad and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV and Visvanathan, V (2008) Within-Die Gate Delay Variability Measurement using Re-configurable Ring Oscillator. In: Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE, 21-24 Sept. 2008, San Jose, CA, pp. 133-136.
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We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and non-inverting) in its unmodified form using digitally reconfigurable ring oscillator (RO). Solving a system of linear equations with different configuration setting of the RO gives delay of an individual gate. Experimental results from a test chip in 65nm process node show the feasibility of measuring the delay of an individual inverter to within 1pS accuracy. Delay measurements of different nominally identical inverters in close physical proximity show variations of up to 26% indicating the large impact of local or within-die variations.
|Item Type:||Conference Poster|
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|Department/Centre:||Division of Electrical Sciences > Electronic Systems Engineering (Formerly, (CEDT) Centre for Electronic Design & Technology)
Division of Electrical Sciences > Electrical Communication Engineering
|Date Deposited:||24 Mar 2009 09:20|
|Last Modified:||19 Sep 2010 05:27|
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