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A multi-microprocessor architecture for solving partial differential equations

Murthy, C Siva Ram and Rajaraman, V (1987) A multi-microprocessor architecture for solving partial differential equations. In: Microprocessing and Microprogramming, 20 (1-3). pp. 113-117.

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Abstract

This paper presents the architecture of a fault-tolerant, special-purpose multi-microprocessor system for solving Partial Differential Equations (PDEs). The modular nature of the architecture allows the use of hundreds of Processing Elements (PEs) for high throughput. Its performance is evaluated by both analytical and simulation methods. The results indicate that the system can achieve high operation rates and is not sensitive to inter-processor communication delay.

Item Type: Journal Article
Additional Information: Copy right of this article belongs to Elsevier Science.
Department/Centre: Division of Electrical Sciences > Computer Science & Automation (Formerly, School of Automation)
Date Deposited: 15 Jan 2010 06:51
Last Modified: 15 Jan 2010 06:51
URI: http://eprints.iisc.ernet.in/id/eprint/21425

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