Shivashankar, HN and Shivaprasad, AP (1983) Ternary adder and subtracter using ternary multiplexer. In: International Journal of Electronics, 54 (2). pp. 201-209.
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Abstract
This paper describes the use of a ternary multiplexer as a building block in the implementation of ternary adders and subtractors and also in the development of ternary coded adders/subtractors.
| Item Type: | Journal Article |
|---|---|
| Additional Information: | Copyright of this article belongs Taylor and Francis Group. |
| Department/Centre: | Division of Electrical Sciences > Electrical Communication Engineering |
| Date Deposited: | 01 Feb 2010 09:58 |
| Last Modified: | 01 Feb 2010 09:58 |
| URI: | http://eprints.iisc.ernet.in/id/eprint/21857 |
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