Design and evaluation of a dual-microcomputer shared memory system with a shared I/O bus

Narasimhan, V Lakshmi and Ramachandra, JK and Anvekar, DK (1986) Design and evaluation of a dual-microcomputer shared memory system with a shared I/O bus. In: Microprocessors and Microsystems, 10 (1). pp. 3-10.

PDF 123.pdf - Published Version Restricted to Registered users only Download (640Kb) | Request a copy

Abstract

The design, implementation and evaluation are described of a dual-microcomputer system based on the concept of shared memory. Shared memory is useful for passing large blocks of data and it also provides a means to hold and work with shared data. In addition to the shared memory, a separate bus between the I/O ports of the microcomputers is provided. This bus is utilized for interprocessor synchronization. Software routines helpful in applying the dual-microcomputer system to realistic problems are presented. Performance evaluation of the system is carried out using benchmarks.

Item Type:	Journal Article
Additional Information:	Copyright of this article belongs to Elsevier Science.
Department/Centre:	Division of Electrical Sciences > Computer Science & Automation (Formerly, School of Automation)
Date Deposited:	21 Aug 2009 08:30
Last Modified:	19 Sep 2010 05:41
URI:	http://eprints.iisc.ernet.in/id/eprint/22414

Actions (login required)

View Item