Hariharan, R and Nagaraj, HS (1974) Synchronous decade up/down counter. In: International Journal of Electronics, 36 (6). pp. 805-809.
Full text not available from this repository. (Request a copy)
Official URL: http://www.informaworld.com/smpp/content~db=all~co...
Abstract
Sequential up/down counting is required many a time. In this paper, the logical design of such a counter of the parallel carry type is furnished.
| Item Type: | Journal Article |
|---|---|
| Additional Information: | Copyright of this article belongs to Taylor and Francis Group. |
| Department/Centre: | Division of Mechanical Sciences > Mechanical Engineering |
| Date Deposited: | 18 Dec 2009 07:04 |
| Last Modified: | 18 Dec 2009 07:04 |
| URI: | http://eprints.iisc.ernet.in/id/eprint/23686 |
Actions (login required)
![]() |
View Item |
