Rajashekhara, TN and Sonde, BS (1975) A new family of low-power CT/SUP 2/L circuits. In: IEEE Journal of Solid-State Circuits, 10 (1). pp. 77-79.
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A new family of low-power logic circuits, employing a multiemitter transistor input circuit and a modified complementary p-n-p n-p-n output stage, having almost the same performance as standard TTL circuits and suitable for IC use, is reported in this correspondence.
|Item Type:||Journal Article|
|Additional Information:||Copyright 1975 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.|
|Department/Centre:||Division of Electrical Sciences > Electrical Communication Engineering|
|Date Deposited:||21 Jan 2010 10:45|
|Last Modified:||19 Sep 2010 05:49|
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