Bhat, S Ashoka Krishna and Vithayathil, Joseph (1979) Firing delay scheme for 3-Ï thyristor converters. In: International Journal of Electronics, 47 (2). pp. 139-145.Full text not available from this repository. (Request a copy)
A simple firing delay circuit for 3-Ï fully controlled bridge using a phase locked loop is described. The circuit uses very few components and is an improved scheme over the existing methods. The use of this circuit in three-phase thyristor converters and 'circulating current free' mode dual converters is described.
|Item Type:||Journal Article|
|Additional Information:||Copy right of this article belongs to Taylor and Francis Group.|
|Department/Centre:||Division of Electrical Sciences > Electrical Engineering|
|Date Deposited:||05 Jan 2010 05:55|
|Last Modified:||05 Jan 2010 05:55|
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