Ray, Biswajit and Mahapatra, Santanu (2008) A New Threshold Voltage Model for Omega Gate Cylindrical Nanowire Transistor. In: Joint Conference of the 21st International Conference on VLSI Design/7th International Conference on Embedded Systems, JAN 04-08, 2008, Hyderabad.
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In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long channel cylindrical body structure. The potential distribution at each and every point of the of the wire is derived with a closed form solution of two dimensional Poisson's equation, which is then used to model the threshold voltage. Proposed model can be treated as a generalized model, which is valid for both surround gate and semi-surround gate cylindrical transistors. The accuracy of proposed model is verified for different device geometry against the results obtained from three dimensional numerical device simulators and close agreement is observed.
|Item Type:||Conference Paper|
|Additional Information:||Copyright 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.|
|Department/Centre:||Division of Electrical Sciences > Electronic Systems Engineering (Formerly, (CEDT) Centre for Electronic Design & Technology)|
|Date Deposited:||09 Mar 2010 08:52|
|Last Modified:||19 Sep 2010 05:55|
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