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Analysis of Energy Quantization Effects on Single-Electron Transistor Circuits

Dan, Surya Shankar and Mahapatra, Santanu (2010) Analysis of Energy Quantization Effects on Single-Electron Transistor Circuits. In: IEEE Transactions on Nanotechnology, 9 (1). pp. 38-45.

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Abstract

In this paper, the effects of energy quantization on different single-electron transistor (SET) circuits (logic inverter, current-biased circuits, and hybrid MOS-SET circuits) are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantizationmainly increases the Coulomb blockade area and Coulomb blockade oscillation periodicity, and thus, affects the SET circuit performance. A new model for the noise margin of the SET inverter is proposed, which includes the energy quantization effects. Using the noise margin as a metric, the robustness of the SET inverter is studied against the effects of energy quantization. An analytical expression is developed, which explicitly defines the maximum energy quantization (termed as ``quantization threshold'') that an SET inverter can withstand before its noise margin falls below a specified tolerance level. The effects of energy quantization are further studiedfor the current-biased negative differential resistance (NDR) circuitand hybrid SETMOS circuit. A new model for the conductance of NDR characteristics is also formulated that explains the energy quantization effects.

Item Type: Journal Article
Additional Information: Copyright 2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Keywords: Coulomb blockade; energy quantization; Monte Carlo (MC) simulation; noise margin; orthodox theory; single-electron transistor (SET)
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly, (CEDT) Centre for Electronic Design & Technology)
Date Deposited: 11 Jun 2010 07:08
Last Modified: 10 Jun 2011 07:46
URI: http://eprints.iisc.ernet.in/id/eprint/27035

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