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A Computationally Efficient PWM Algorithm for Multilevel Inverters

Joshi, Subhash TS and Haneesh, AS and Narayanan, G and Ranganathan, VT (2003) A Computationally Efficient PWM Algorithm for Multilevel Inverters. In: National Power Electronics Conference 2003, IIT Bombay, October 2003, IIT Bombay, Powai, Mumbai.

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Abstract

Centred space vector PWM (CSVPWM) technique is popularly used for three level voltage source inverters. The reference voltage vector is synthesized by time-averaging of the three nearest voltage vectors produced by the inverter. Identifying the three voltage vectors, and calculation of the dwelling time for each vector are both computationally intensive. This paper analyses the process of PWM generation in CSVPWM. This analysis breaks up a three-level inverter into six different conceptual two level inverters in different regions of the fundamental cycle. Control of 3-level inverter is viewed as the control of the appropriate 2-level inverter. The analysis leads to a systematic simplification of the computations involved, finally resulting in a computationally efficient PWM algorithm. This algorithm exploits the equivalence between triangle comparison and space vector approaches to PWM generation. This algorithm does not involve any 3-phase/2-phase or 2-phase/3-phase transformation. This also does not involve any transformation from rectangular to polar coordinates, and vice versa. Further no evaluation of trigonometric functions is necessary. This algorithm also provides for the mitigation of DC neutral point unbalance, and is well suited to digital implementation. Simulation and experimental results are presented.

Item Type: Conference Paper
Keywords: Power electronics, voltage source inverter, multilevel inverter, pulse width modulation (PWM, space vector PWM, carrier based PWM
Department/Centre: Division of Electrical Sciences > Electrical Engineering
Date Deposited: 02 Nov 2010 06:51
Last Modified: 02 Nov 2010 06:51
URI: http://eprints.iisc.ernet.in/id/eprint/33489

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