Majumdar, Kausik and Bhat, Navakanta and Majhi, Prashant and Jammy, Raj (2010) Effects of Parasitics and Interface Traps on Ballistic Nanowire FET in the Ultimate Quantum Capacitance Limit. In: IEEE Transactions on Electron Devices, 57 (9). pp. 2264-2273.
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In this paper, we focus on the performance of a nanowire field-effect transistor in the ultimate quantum capacitance limit (UQCL) (where only one subband is occupied) in the presence of interface traps (D-it), parasitic capacitance (C-L), and source/drain series resistance (R-s,R-d), using a ballistic transport model and compare the performance with its classical capacitance limit (CCL) counterpart. We discuss four different aspects relevant to the present scenario, namely: 1) gate capacitance; 2) drain-current saturation; 3) subthreshold slope; and 4) scaling performance. To gain physical insights into these effects, we also develop a set of semianalytical equations. The key observations are as follows: 1) A strongly energy-quantized nanowire shows nonmonotonic multiple-peak C-V characteristics due to discrete contributions from individual subbands; 2) the ballistic drain current saturates better in the UQCL than in the CCL, both in the presence and absence of D-it and R-s,R-d; 3) the subthreshold slope does not suffer any relative degradation in the UQCL compared to the CCL, even with Dit and R-s,R-d; 4) the UQCL scaling outperforms the CCL in the ideal condition; and 5) the UQCL scaling is more immune to R-s,R-d, but the presence of D-it and C-L significantly degrades the scaling advantages in the UQCL.
|Item Type:||Journal Article|
|Additional Information:||Copyright 2010 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.|
|Keywords:||Ballistic transistor; coupled Poisson-Schrodinger equations; interface traps; nanowire field-effect transistor (FET); parasitic capacitance; quantum capacitance limit (QCL); transistor scaling|
|Department/Centre:||Division of Electrical Sciences > Electrical Communication Engineering
|Date Deposited:||08 Nov 2010 09:50|
|Last Modified:||08 Nov 2010 09:50|
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