ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

The state of VLSI testing

Patnaik, LM and Jamadagni, HS and Agrawal, VK and Varaprasad, BKSVL (2002) The state of VLSI testing. In: IEEE Potentials, 21 (3). pp. 12-16.

[img]
Preview
PDF
01033655.pdf

Download (390Kb)

Abstract

The phenomenal development in electronic systems has, in large part, the advances in Very Large Scale of Integration (VLSI) semiconductor technologies to thank. Performance, area, power and testing are some of the most important improvements. With the reduction in device sizes, it is becoming possible to fit increasingly larger number of transistors onto a single chip. However, as chip density increases, the probability of defects occurring in a chip increases as well. Thus, the quality, reliability and cost of the product are directly related to the intensity/level of testing of the product. As a result, gradually, Integrated Circuits (ICs) testing has shifted from the final fabricated ICs to the design stage. In this context, many Design For Testability (DFT) techniques have been developed to ease the testing process.

Item Type: Journal Article
Additional Information: ©2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly, (CEDT) Centre for Electronic Design & Technology)
Date Deposited: 03 Aug 2005
Last Modified: 19 Sep 2010 04:19
URI: http://eprints.iisc.ernet.in/id/eprint/3448

Actions (login required)

View Item View Item