Somasekhar, VT and Gopakumar, K (2003) Three-level inverter configuration cascading two two-level inverters. In: IEE Proceedings of Electric Power Applications, 150 (3). pp. 245-254.
A power circuit configuration to realise three-level inversion is proposed. Three-level inversion is realised by connecting two two-level inverters in cascade, in the proposed configuration. An isolated DC power supply is used to supply each inverter in this power circuit. Each DC-link voltage is equal to half of the DC-link voltage in a conventional NPC (neutral point clamped) three-level inverter topology. Neutral point fluctuations are absent, and fast recovery neutral clamping diodes are not needed. The proposed inverter scheme produces 64 space-vector combinations distributed over 19 space-vector locations as compared to 27 combinations in a conventional three-level topology. The present power circuit can be operated as a two-level inverter in the range of lower modulation, by clamping one inverter to a zero state and by switching the other inverter. When compared to the H-bridge topology, this circuit needs one power supply less. A space vector based PWM scheme is used for the experimental verification of the proposed topology.
|Item Type:||Journal Article|
|Additional Information:||Copyright of this article belongs to Institution of Electrical Engineers (IEE)|
|Department/Centre:||Division of Electrical Sciences > Electronic Systems Engineering (Formerly, (CEDT) Centre for Electronic Design & Technology)|
|Date Deposited:||13 Sep 2005|
|Last Modified:||19 Sep 2010 04:19|
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