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Energy-Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding

Subramanyan, Pramod and Singh, Virendra and Saluja, Kewal K and Larsson, Erik (2010) Energy-Efficient Fault Tolerance in Chip Multiprocessors Using Critical Value Forwarding. In: IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), JUN 28-JUL 01, 2010, Chicago, IL,, pp. 121-130.

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Abstract

Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chip fault tolerance in future chip microprocessors (CMPs). In this paper we introduce a new energy-efficient fault-tolerant CMP architecture known as Redundant Execution using Critical Value Forwarding (RECVF). RECVF is based on two observations: (i) forwarding critical instruction results from the leading to the trailing core enables the latter to execute faster, and (ii) this speedup can be exploited to reduce energy consumption by operating the trailing core at a lower voltage-frequency level. Our evaluation shows that RECVF consumes 37% less energy than conventional dual modular redundant (DMR) execution of a program. It consumes only 1.26 times the energy of a non-fault-tolerant baseline and has a performance overhead of just 1.2%.

Item Type: Conference Paper
Additional Information: Copyright 2006 IEEE. Personal use of this material is permitted.However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre: Division of Information Sciences > Supercomputer Education & Research Centre
Date Deposited: 07 Mar 2011 08:42
Last Modified: 07 Mar 2011 08:42
URI: http://eprints.iisc.ernet.in/id/eprint/35920

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