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PWB Miniaturization by embedded passives and Sequential Build-up (SBU) Process Methodology using microvia interconnects

Balakrishnan, PS and Arockiasamy, P and Antonisamy, C and Vasanta, KB and Mahesh, GV (2008) PWB Miniaturization by embedded passives and Sequential Build-up (SBU) Process Methodology using microvia interconnects. In: Proceedings of the 24th Annual In-house Symposium on Space Science and Technology, IISc, 30-31 January 2008.

Full text not available from this repository.
Item Type: Conference Paper
Additional Information: Copyright of this article belongs to Indian Institute of Science.
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly, (CEDT) Centre for Electronic Design & Technology)
Date Deposited: 17 Oct 2011 06:37
Last Modified: 17 Oct 2011 06:37
URI: http://eprints.iisc.ernet.in/id/eprint/40649

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