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On Reduction of Capture Powerfor Modular System-on-Chip Test

Singh, Virendra and Larsson, Erik (2008) On Reduction of Capture Powerfor Modular System-on-Chip Test. In: IEEE Workshop on RTL and High Level Testing (WRTLT'08), Sapporo, JAPAN, November 27-28, 2008, November 27-28, 2008, Sapporo.

Full text not available from this repository.
Official URL: http://www.ida.liu.se/labs/eslab/publications/PAP....
Item Type: Conference Paper
Department/Centre: Division of Information Sciences > Supercomputer Education & Research Centre
Date Deposited: 11 Oct 2011 05:06
Last Modified: 11 Oct 2011 05:06
URI: http://eprints.iisc.ernet.in/id/eprint/41143

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