Srinivasa, N and Rajgopal, K and Ramakrishnan, KR (2003) On a programmable signal processor for VLSI. In: IEEE International Conference on ICASSP '87. Acoustics, Speech, and Signal Processing, Apr 1987.
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This paper presents a method of designing a programmable signal processor based on a bit parallel matrix vector matrix multiplier (linear transformer). The salient feature of this design is that the efficiency of the direct vector matrix multiplier is improved and VLSI design is made much simpler by trading off the more expensive arithematic operation (multiplication) for 'cheaper' manipulation (addition/subtraction) of the data.
|Item Type:||Conference Paper|
|Additional Information:||Copyright 1987 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.|
|Department/Centre:||Division of Electrical Sciences > Electrical Engineering|
|Date Deposited:||26 Dec 2011 07:59|
|Last Modified:||26 Dec 2011 07:59|
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