Banerjee, Subhasis and Surendra, G and Nandy, SK (2004) On the Effectiveness of Dynamically Allocating Resources Across Program Execution Phases for Media Workloads. In: The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004, 6-9 December, Tainan,Taiwan, Vol.1, 9-12.
Processing embedded applications is essentially a trade-off between power and performance. Increasing level of complexity in present day microprocessor at the expense of more power call for different optimization methodologies at architecture level. The study of general characteristics of program execution phases gives insight to dynamically reconfigure or enable/disable additional resources on-demand basis. This leads to significant amount of power saving with negligible or tolerable performance degradation. We characterize execution of such programs into execution phases based on their dynamic IPC profile. We show that program execution of selected phases (based on IPC profile) can be dynamically boosted by activating additional standby functional units which are otherwise powered down for saving energy. Through simulation we show that speedup ranging from 1.1 to 1.25 can be achieved while reducing the energy-delay product (EDP) for most of the media benchmarks evaluated.
|Item Type:||Conference Paper|
|Additional Information:||Ã�Â©1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.|
|Department/Centre:||Division of Information Sciences > Supercomputer Education & Research Centre|
|Date Deposited:||07 Dec 2005|
|Last Modified:||19 Sep 2010 04:21|
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