Beig, AR and Ranganathan, VT (2003) Space vector based bus clamped PWM algorithms for three level inverters: implementation, performance analysis and application considerations. In: Applied Power Electronics Conference and Exposition, 2003. APEC '03. Eighteenth Annual IEEE , FEB 09-13, 2003, Miami, Florida.
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This paper describes the different types of space vector based bus clamped PWM algorithms for three level inverters. A novel bus clamp PWM algorithm for low modulation indices region is also presented. The principles and switching sequences of all the types of bus clamped algorithms for high switching frequency are presented. Synchronized version of the PWM sequences for high power applications where switching frequency is low is also presented. The implementation details on DSP based digital controller and experimental results are presented. The THD of the output waveforms is studied for the entire operating region and is compared with the conventional space vector PWM technique. The bus clamped techniques can be used to reduce the switching losses or to improve the output voltage quality or both.. Different issues dominate depending on the type of application and power rating of the inverters. The results presented in this paper can be used for judicious use of the PWM techniques, which result in improved system efficiency and performance.
|Item Type:||Conference Paper|
|Additional Information:||Copyright 2003 IEEE. Personal use of this material is permitted.However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.|
|Department/Centre:||Division of Electrical Sciences > Electrical Engineering|
|Date Deposited:||16 Mar 2012 12:09|
|Last Modified:||16 Mar 2012 12:09|
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