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Performance improvement of short-length regular low-density parity-check codes with low-complexity post-processing

Bhattar, RK and Ramakrishnan, KR and Dasgupta, KS (2012) Performance improvement of short-length regular low-density parity-check codes with low-complexity post-processing. In: IET COMMUNICATIONS, 6 (15). pp. 2487-2496.

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Official URL: http://dx.doi.org/10.1049/iet-com.2011.0292

Abstract

It is well known that extremely long low-density parity-check (LDPC) codes perform exceptionally well for error correction applications, short-length codes are preferable in practical applications. However, short-length LDPC codes suffer from performance degradation owing to graph-based impairments such as short cycles, trapping sets and stopping sets and so on in the bipartite graph of the LDPC matrix. In particular, performance degradation at moderate to high E-b/N-0 is caused by the oscillations in bit node a posteriori probabilities induced by short cycles and trapping sets in bipartite graphs. In this study, a computationally efficient algorithm is proposed to improve the performance of short-length LDPC codes at moderate to high E-b/N-0. This algorithm makes use of the information generated by the belief propagation (BP) algorithm in previous iterations before a decoding failure occurs. Using this information, a reliability-based estimation is performed on each bit node to supplement the BP algorithm. The proposed algorithm gives an appreciable coding gain as compared with BP decoding for LDPC codes of a code rate equal to or less than 1/2 rate coding. The coding gains are modest to significant in the case of optimised (for bipartite graph conditioning) regular LDPC codes, whereas the coding gains are huge in the case of unoptimised codes. Hence, this algorithm is useful for relaxing some stringent constraints on the graphical structure of the LDPC code and for developing hardware-friendly designs.

Item Type: Journal Article
Additional Information: Copyright of this article belongs to Institution of Engineering and Technology-IET.
Department/Centre: Division of Electrical Sciences > Electrical Engineering
Date Deposited: 10 Jun 2013 07:53
Last Modified: 10 Jun 2013 07:53
URI: http://eprints.iisc.ernet.in/id/eprint/46674

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