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SEU Reliability Improvement Due to Source-Side Charge Collection in the Deep-Submicron SRAM Cell

Saxena, Prashant Kumar and Bhat, Navakanta (2003) SEU Reliability Improvement Due to Source-Side Charge Collection in the Deep-Submicron SRAM Cell. In: IEEE Transactions on Device and Materials Reliability, 3 (1). pp. 14-17.

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Abstract

The effect of technology scaling $(0.5-0.09\mu{m})$ on single event upset (SEU) phenomena is investigated using full two-dimensional device simulation. The SEU reliability parameters, such as critical charge $(Q_{crit})$, feedback time $(T_{fd})$ and linear energy transfer (LET), are estimated. For $L_g<0.18\mu{m}$, the source node collects a significant fraction of radiation-induced charge resulting in an increase of LET, despite the lower critical charge at the sensitive drain node. The effect of striking location on LET confirms this finding.

Item Type: Journal Article
Additional Information: �©1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Keywords: Bipolar injection effect;Critical charge (Qcrit); Deep submicron (DSM);Drain-induced barrier lowering (DIBL); Feedback time (Tfd);Linear energy transfer (LET);Single event upset (SEU);Source-side charge collection (SSCC)
Department/Centre: Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited: 21 Dec 2005
Last Modified: 19 Sep 2010 04:22
URI: http://eprints.iisc.ernet.in/id/eprint/4709

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