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Simulated Annealing-Based Channel Routing on Hypercube Computers

Mall, R and Patnaik, LM and Raman, Srilata (1991) Simulated Annealing-Based Channel Routing on Hypercube Computers. In: 1991 Fourth CSI/IEEE International Symposium on VLSI Design, 4-8 January, New Delhi,India, pp. 75-81.

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Abstract

Many times, routing of signal nets in the layout design of VLSI circuits turns out to be a bottleneck in designing complex chips, due to the inherent compute-intensive nature of this task. Parallel processing of the routing problem holds promise for mitigating this situation. In this context, we present a parallel channel routing algorithm that is targeted to run on loosely coupled computers like hypercubes. The proposed parallel algorithm employs simulated annealing technique for achieving near-optimum solutions. For efficient execution, attempts have been made to reduce the communication overheads by restricting broadcast of updates only to cases of interprocessor net transfers.Performance evaluation studies on the algorithm show promising results.

Item Type: Conference Paper
Additional Information: Copyright 1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Keywords: Parallel Algorithms;Channel Router;Hypercube Architecture; Simulated Annealing Algorithm
Department/Centre: Division of Information Sciences > Supercomputer Education & Research Centre
Division of Electrical Sciences > Computer Science & Automation (Formerly, School of Automation)
Date Deposited: 29 May 2006
Last Modified: 19 Sep 2010 04:27
URI: http://eprints.iisc.ernet.in/id/eprint/7000

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