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High Speed Digital Filtering on SRAM-based FPGAs

Giri, A and Visvanathan, V and Nandy, SK and Ghoshal, SK (1994) High Speed Digital Filtering on SRAM-based FPGAs. In: Seventh International Conference on VLSI Design, 1994, 5-8 January, Kolkotta,India, 229 -232.

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Abstract

Field programmable gate arrays (FPGAs) represent a very promising technology that attempts to provide the benefits of custom VLSI with low turn-around time. However, the applicability of this technology for serious DSP applications, that are compute-intensive and typically demand high throughput, has not yet been fully explored. As a case study, real time digital FIR filters of both the constant and programmable coefficient types are considered. Two filters, one of each type, have been successfully implemented in SRAM-based FPGA parts. In the process of design, several generic issues surfaced: the most important among them being efficient utilisation of routing resources. As ever-improving process technology enables higher and higher speeds of operation, density seems to be the more important deciding factor for the feasibility of such applications on FPGAs.

Item Type: Conference Paper
Additional Information: Copyright 1990 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre: Division of Information Sciences > Supercomputer Education & Research Centre
Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited: 25 Aug 2008
Last Modified: 19 Sep 2010 04:27
URI: http://eprints.iisc.ernet.in/id/eprint/7123

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