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Conference Paper

Sindia, Suraj and Singh, Virendra and Agrawal , Vishwani (2009) V-Transform: “An Enhanced Polynomial Coefficient Based DC Test for Non-linear Analog Circuits. In: IEEE East West Design and Test Symposium (EWDTS) 2009, Sep 2009, Moscow, Russia.

Sindia, Suraj and Singh, Virendra and Agrawal, Vishwani (2009) Bounds on Defect Level and Fault Coverage in Linear Analog Circuit Testing. In: 14th IEEE VLSI Design and Test Symposium (VDAT), July 2009, Bangalore.

This list was generated on Wed Oct 16 05:18:40 2019 IST.