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Bondada, Sivakumar and Raha, Soumyendu and Mahapatra, Santanu (2010) An efficient reduction algorithm for computation of interconnect delay variability for statistical timing analysis in clock tree planning. In: Sadhana : Academy Proceedings in Engineering Sciences, 35 (4). pp. 407-418.

This list was generated on Wed Jul 30 23:45:26 2014 IST.