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Number of items: 7.

Conference Paper

Das, Bishnu Prasad and Janakiraman, V and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV (2008) Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. In: IEEE International Conference on VLSI Design, Hyderabad, India, 4-8 Jan. 2008, Hyderabad .

Das, Bishnu Prasad and Janakiraman, V and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV (2008) Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. In: IEEE VLSI Design Conference, Hyderabad, India, Jan 2008, 4-8 Jan. 2008 , Hyderabad.

Viraraghavan, Janakiraman and Das, Bishnu Prasad and Amrutur, Bharadwaj (2008) Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization. In: IEEE International Conference on VLSI Design 2008, 4-8 Jan. 2008 , Hyderabad .

Das, Bishnu Prasad and Amrutur, Bharadwaj and Jamadagni, HS (2006) Critical path modeling for dynamic voltage scaling (DVS) in low power applications. In: VLSI Design and Test Symposium, June 2006.

Conference Poster

Das, Bishnu Prasad and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV and Visvanathan, V (2008) Within-Die Gate Delay Variability Measurement using Re-configurable Ring Oscillator. In: Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE, 21-24 Sept. 2008, San Jose, CA, pp. 133-136.

Journal Article

Das, Bishnu Prasad and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV and Visvanathan, V (2011) Voltage and Temperature-Aware SSTA Using Neural Network Delay Model. In: IEEE Transactions on Semiconductor Manufacturing, 24 (4). pp. 533-544.

Das, Bishnu Prasad and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV and Visvanathan, V (2009) Within-Die Gate Delay Variability Measurement Using Reconfigurable Ring Oscillator. In: IEEE Transactions on Semiconductor Manufacturing, 22 (2). pp. 256-267.

This list was generated on Wed Oct 16 05:05:24 2019 IST.