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Number of items: 13.

Conference Proceedings

Das, Saptarsi and Narayan, Ranjani and Narayan, Soumitra Kumar (2012) Accelerating Reduction for Enabling Fast Multiplication over Large Binary Fields. In: 8th International Joint Conference on e-Business and Telecommunications, JUL 18-21, 2011, Seville, SPAIN , pp. 249-263.

Das, Saptarsi and Varadarajan, Keshavan and Garga, Ganesh and Mondal, Rajdeep and Narayan, Ranjani and Nandy, SK (2011) A method for flexible reduction over binary fields using a field multiplier. In: SECRYPT 2011 - Proceedings of the International Conference on Security and Cryptography, 18-21 July, Seville, Spain.

Conference Paper

Fell, Alexander and Biswas, Prasenjit and Chetia, Jugantor and Nandy, SK and Narayan, Ranjani (2009) Generic Routing Rules and a Scalable Access Enhancement for the Network-on-Chip RECONNECT. In: IEEE International SOC Conference, SEP 09-11, 2009, Belfast, pp. 251-254.

Rao, Adarsha and Alle, Mythri and Sainath, V and Shaik, Reyaz and Chowhan, Rajashekhar and Sankaraiah, S and Mantha, Sravanthi and Nandy, SK and Narayan, Ranjani (2009) An Input Triggered Polymorphic ASIC for H.264 Decoding. In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 07-09, 2009, Boston, MA, USA, pp. 106-113.

Fell, Alexander and Alle, Mythri and Varadarajan, Keshavan and Biswas, Prasenjit and Das, Saptarsi and Chetia, Jugantor and Nandy, SK and Narayan, Ranjani (2009) Streaming FFT on REDEFINE-v2: An Application-Architecture Design Space Exploration. In: proceedings of the 2009 International Conference on Compilers,Architecture and Synthesis for Embedded Systems (CASES 2009),, Grenoble,Frane.

Rao, Adrsha and Mythri, * and Nandy, SK and Narayan, Ranjani (2008) Architecture of a polymorphic ASIC for interoperability across multi-mode H.264 decoders. In: 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 02-04, 2008, Leuven.

Satrawala, AN and Varadarajan, Keshavan and Alle, Mythri and Nandy, SK and Narayan, Ranjani (2007) REDEFINE: Architecture of a SoC Fabric for Runtime Composition of Computation Structures. In: Proceedings of the International Conference on Field Programmable Logic and Applications, FPL 2007, Amsterdam, Aug 2007., 27-29 Aug. 2007 , Amsterdam .

Lakshmi, J and Nandy, SK and Narayan, Ranjani and Varadarajan, Keshavan (2006) Framework for enabling highly available distributed applications for utility computing. In: 4th International Symposium on Parallel and Distributed Processing and Applications,, Dec 04-06, 2006, Sorrento, Italy, pp. 549-560.

Nainwal, KC and Lakshmi, J and Nandy, SK and Narayan, Ranjani and Varadarajan, K (2005) A Framework for QoS Adaptive Grid Meta Scheduling. In: Sixteenth International Workshop on : Database and Expert Systems Applications, 2005, 22-26 August, Denmark, pp. 292-296.

Narayan, Ranjani and Rajaraman, V (1989) A Method to Evaluate the Performance of a Multiprocessor Machine based on Data Flow Principles. In: Fourth IEEE Region 10 International Conference,TENCON '89, 22-24 November, Bombay,India, pp. 209-212.

Journal Article

Garga, Ganesh and Das, Saptarsi and Nandy, SK and Narayan, Ranjani and Haldar, Chandan and Jagtap, Maheshkumar P and Dash, Siba Prasad (2012) A Flexible Crypto-system Based upon the REDEFINE Polymorphic ASIC Architecture. In: Defence Science Journal, 62 (1). pp. 25-31.

Alle, Mythri and Varadarajan, Keshavan and Fell, Alexander and Reddy, Ramesh C and Joseph, Nimmy and Das, Saptarsi and Biswas, Prasenjit and Chetia, Jugantor and Rao, Adarsh and Nandy, SK and Narayan, Ranjani (2009) Redefine: Runtime Reconfigurable Polymorphic ASIC. In: ACM Transactions in Embedded Computing Systems (TECS), 9 (2).

Narayan, Ranjani and Rajaraman, V (1990) Performance analysis of a multiprocessor machine based on data flow principles. In: Microprocessing and Microprogramming, 30 (1-5). pp. 601-608.

This list was generated on Sat Apr 19 16:05:00 2014 IST.