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Prasanth, V and Singh, Virendra and Parekhji, Rubin (2012) Derating Based Hardware Optimizations in Soft Error Tolerant Designs. In: 30th IEEE VLSI Test Symposium (VTS), APR 23-25, 2012, Hawaii, USA, pp. 282-287.

Surendran, Sudhakar and Parekhji, Rubin and Govindarajan, R (2008) A Systematic Approach to Synthesis of Verification Test-suites for Modular SoC Designs. In: In Proc. of the 21st Annual IEEE SoC Conference, (SoCC-08), Newport Beach, CA, USA, 17-20 Sept. 2008 , Newport Beach, CA .

This list was generated on Wed Nov 26 20:55:42 2014 IST.