ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

Browse by Author

Up a level
Export as [feed] Atom [feed] RSS 1.0 [feed] RSS 2.0
Group by: Item Type | No Grouping
Number of items: 9.

Conference Proceedings

Devi, Anant and Gandhi, Maulik and Varghese, Kuruvilla and Gope, Dipanjan (2013) Hardware Accelerator for 3D Method of Moments based Parasitic Extraction. In: IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), DEC 12-15, 2013, Nara, JAPAN, pp. 100-103.

Conference Paper

Shah, Jimit and Raghunandan, KS and Varghese, Kuruvilla (2012) HD resolution intra prediction architecture for H.264 decoder. In: 2012 25th International Conference on VLSI Design , January 07-January 11, Hyderabad.

Anand, T and Varghese, Kuruvilla and Waghela, Yagnesh (2011) A scalable network port scan detection system on FPGA. In: 2011 International Conference on Field-Programmable Technology (FPT), 12-14 Dec. 2011, New Delhi.

Shah, Jimit and Raghunandan, KS and Varghese, Kuruvilla (2010) Area Optimized H.264 Intra Prediction Architecture for 1080p HD Resolution. In: 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 07-09, 2010, Rennes, FRANCE.

Divyasree, J and Rajashekar, H and Varghese, Kuruvilla (2008) Dynamically Reconfigurable Regular Expression Matching Architecture. In: 20th IEEE International Conference on Application-specific Systems, Architectures and Processors 2008 (ASAP 2008), 2-4 July 2008, Leuven.

Jedhe, Gajanan S and Ramamoorthy, Arun and Varghese, Kuruvilla (2008) A Scalable High Throughput Firewall in FPGA. In: 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, APR 14-15, 2008, Stanford, CA, pp. 43-52.

Jedhe, Gajanan S and Ramamoorthy, Arun and Varghese, Kuruvilla (2008) A Scalable High Throughput Firewall in FPGA. In: 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, APR 14-15, 2008, Stanford, CA,.

Journal Article

Devi, Anant and Gandhi, Maulik and Varghese, Kuruvilla and Gope, Dipanjan (2016) Accelerating method of moments based package-board 3D parasitic extraction using FPGA. In: MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, 58 (4). pp. 776-783.

Venkateshan, Sriram and Patel, Alap and Varghese, Kuruvilla (2015) Hybrid Working Set Algorithm for SVM Learning With a Kernel Coprocessor on FPGA. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 23 (10). pp. 2221-2232.

This list was generated on Tue Aug 30 17:04:02 2016 IST.